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Integrated Circuit Interconnect Structures With Ultra-Thin Metal Chalcogenide Barrier Materials

2024-12-10

ALEXANDRIA, Virginia, Dec. 10 -- INTEL CORPORATION, Santa Clara, California has been assigned a patent (No. US 12165917 B2, initially filed Nov. 2, 2020) developed by Carl Naylor, Portland, Oregon, and Christopher Jezewski, Portland, Oregon, for "Integrated circuit interconnect structures with ultra-thin metal chalcogenide barrier materials." . . .

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Integrated Circuit Interconnect Structures With Ultra-Thin Metal Chalcogenide Barrier Materials

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