Monday - December 23, 2024

Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers

2024-11-26

ALEXANDRIA, Virginia, Nov. 26 -- ADEIA SEMICONDUCTOR SOLUTIONS LLC, San Jose, California has been assigned a patent (No. US 12154971 B2, initially filed May 9, 2023) developed by three inventors Kangguo Cheng, Schenectady, New York; Julien Frougier, Albany, New York; and Nicolas Loubet, Guilderland, New York, for "Forming nanosheet transistor using sacrificial spacer and inner spacers." . . .

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Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers

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