Monday - December 23, 2024

At-Speed Synchronous Write-Through Operation for Testing Two-Port Memory

2024-11-19

ALEXANDRIA, Virginia, Nov. 19 -- SYNOPSYS, INC., Sunnyvale, California has been assigned a patent (No. US 12148490 B1, initially filed March 9, 2023) developed by Harold Pilo, Underhill, Vermont, and Anurag Garg, Cupertino, California, for "At-speed synchronous write-through operation for testing two-port memory." . . .

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At-Speed Synchronous Write-Through Operation for Testing Two-Port Memory

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