Tuesday - December 24, 2024

Guard Ring Design Enabling In-Line Testing of Silicon Bridges for Semiconductor Packages

2024-11-12

ALEXANDRIA, Virginia, Nov. 12 -- INTEL CORPORATION, Santa Clara, California has been assigned a patent (No. US 12142553 B2, initially filed April 24, 2023) developed by three inventors Arnab Sarkar, Chandler, Arizona; Sujit Sharan, Chandler, Arizona; and Dae-Woo Kim, Phoenix, Arizona, for "Guard ring design enabling in-line testing of silicon bridges for semiconductor packages." . . .

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Guard Ring Design Enabling In-Line Testing of Silicon Bridges for Semiconductor Packages

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