Wednesday - December 25, 2024

Integration of Ferroelectric Memory Devices Having Stacked Electrodes With Transistors

2024-11-05

ALEXANDRIA, Virginia, Nov. 5 -- KEPLER COMPUTING INC., San Francisco, California has been assigned a patent (No. US 12137574 B2, initially filed Aug. 15, 2023) developed by five inventors Sasikanth Manipatruni, Portland, Oregon; Rajeev Kumar Dokania, Beaverton, Oregon; Ramamoorthy Ramesh, Moraga, California; Gaurav Thareja, Santa Clara, California; and Amrita Mathuriya, Portland, Oregon, for "Integration of ferroelectric memory devices having stacked electrodes with transistors." . . .

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Integration of Ferroelectric Memory Devices Having Stacked Electrodes With Transistors

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