Wednesday - December 25, 2024

Low Latency Post-Quantum Signature Verification for Fast Secure-Boot

2024-11-05

ALEXANDRIA, Virginia, Nov. 5 -- INTEL CORPORATION, Santa Clara, California has been assigned a patent (No. US 12137169 B2, initially filed June 30, 2022) developed by seven inventors Santosh Ghosh, Hillsboro, Oregon; Vikram Suresh, Portland, Oregon; Sanu Mathew, Portland, Oregon; Manoj Sastry, Portland, Oregon; Andrew H. Reinders, Portland, Oregon; Raghavan Kumar, Hillsboro, Oregon; and Rafael Misoczki, Hillsboro, Oregon, for "Low latency post-quantum signature verification for fast secure-boot . . .

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Low Latency Post-Quantum Signature Verification for Fast Secure-Boot

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