Wednesday - December 25, 2024

Fabrication of a Vertical Fin Field Effect Transistor With Reduced Dimensional Variations

2024-11-05

ALEXANDRIA, Virginia, Nov. 5 -- ADEIA SEMICONDUCTOR SOLUTIONS LLC, San Jose, California has been assigned a patent (No. US 12136573 B2, initially filed Sept. 7, 2023) developed by Kangguo Cheng, Schenectady, New York, for "Fabrication of a vertical fin field effect transistor with reduced dimensional variations." . . .

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Fabrication of a Vertical Fin Field Effect Transistor With Reduced Dimensional Variations

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